LATTE is a venue for discussion, debate, and brainstorming at the intersection of hardware acceleration and programming languages research. The core mission is to bring ideas we love from software programming languages and tools to the world of hardware design. See the call for papers for more details.
Attending LATTE
LATTE is a hybrid workshop; please consider attending either in person (in Pittsburgh, co-located with ASPLOS) or virtually (on Zoom). LATTE will be held on March 23, 2026.
- To attend in person, register to attend ASPLOS workshops.
- To attend virtually, no conference registration is required. Please sign up using this Zoom form to receive a link to join.
LATTE Matrix Chat
We have set up a matrix chat to keep the latte community in touch outside the main LATTE event. Join it here. Any vaguely LATTE-related discussion is encouraged! Showcase cool projects you built, discuss new ideas or problems you've run into, or just hang out with the community.
Program
Check back soon for the workshop program! Meanwhile, here's a list of accepted papers:
- "Modeling multi-chiplet architectures for TPU co-design." Kavya Sreedhar, Pritha Doddahosahally Narayanappa, Hung-Ming Hsu, Khai Tran, Hardie Cate, Narges Shahidi, Zhijie Deng, Avinash Lingamneni, Thejasvi Vijayaraj, and Aditya Yanamandra (Google); Sameer Kumar (Meta); Ming Liu and Lluis-Miquel Munguia (Google)
- "OPERA: Towards an Open Platform for Extensible Robust Accelerators." Federico Nicolás Peccia and Anton Paule (FZI Research Center for Information Technology); Oliver Bringmann (University of Tübingen)
- "From Pragmas to Partners: A Symbiotic Evolution of Agentic High-Level Synthesis." Niansong Zhang and Sunwoo Kim (Cornell University); Shreesha Srinath (Cerebras Systems); Zhiru Zhang (Cornell University)
- "Interactive Compiler Scheduling with Strong Guarantees." Evan Williams (Unaffiliated); Justin Lubin (UC Berkeley); Rubens Lacouture (Stanford University); Olivia Hsu (Stanford University, Carnegie Mellon University)
- "TaPaSCo: Towards a Plug-and-Play FPGA Experience." Torben Kalkhof, David Volz, and Andreas Koch (TU Darmstadt)
- "A Position on Language Abstraction for Custom Circuit Design." Yongsheng Qin and Zachary D. Sisco (The Chinese University of Hong Kong, Shenzhen)
- "Is It a Good Idea to Build an HLS Tool on Top of MLIR? Experience from Building the Dynamatic HLS Compiler." Jiahui Xu, Emmet Murphy, and Lana Josipović (ETH Zurich)
- "Hardware Deserves a REPL." Karl Hallsby and Peter Dinda (Northwestern University)
- "Implementing Cache Coherence with Coroutines: A Case Study." Andrew David Alex (University of Washington); Jingtao Xia (UC Santa Barbara); Gus Henry Smith (Southmountain Research); Rachit Nigam (MIT CSAIL); Jonathan Balkind (UC Santa Barbara); Gilbert Bernstein (University of Washington)
- "A Position on Tropical-Time for HLS." Sijie Kong (UC Santa Barbara); Jonathan Balkind (UCSB)
- "Encoding Purely Functional Languages in an RTL-based Compiler." Amelia Dobis, Gongqi Huang, and Mae Milano (Princeton University)
- "Towards Choreographic Programming for Hardware Design." Arjun Vedantham and William S. Moses (University of Illinois Urbana-Champaign)
- "Marlin: A Hardware Testing and Simulation Frontend in Rust." Ethan Uppal (Cornell University)
- "Unifying HLS and RTL with Timeline Types." Jingtao Xia (University of California, Santa Barbara); Ayana Alemayehu (MIT); Sijie Kong (University of California, Santa Barbara); Rachit Nigam (MIT); Jonathan Balkind and Ben Hardekopf (University of California, Santa Barbara)
- "STAMPS: Fast Synthesis Through Specialized Templates." Kalyan Sriram and Joshua San Miguel (University of Wisconsin - Madison)
- "CaST: Balancing Accelerator Design." Alborz Jelvani, Richard P. Martin, and Negin Dehghanchaleshtori (Rutgers University)
- "Portable Dynamic Tiling for Sparse Tensor Accelerators." Sai Gautham Ravipati, Fredrik Berg Kjolstad, Priyanka Raina, and Olivia Hsu (Stanford University)
- "Defining Safe Hardware Design." Rachit Nigam (MIT)
- "Check out my sabbatical project." Jonathan Balkind (UC Santa Barbara)
- "STEP: Spatially Threaded Execution Pipeline." Ang Da Lu, Jiayi Wang, and Ang Li (University of Washington)
- "Cyclotron: The Streaming Multiprocessor Abstraction is Dead." Shiv Sundram, Akhilesh Balasingam, Thierry Thambe, Kunle Olukoturn, and Fredrik Kjolstad (Stanford University)
- "Language-based Hardware Communication Safety and Liveness." Aditya Ranjan Jha, Jason Yu, Umang Mathur, Trevor E. Carlson, and Prateek Saxena (National University of Singapore)
- "fud2: A Framework for Making Build Tool Orchestrators." Jeremy Ku-Benjet and Adrian Sampson (Cornell University)
- "Prost! Coroutine-based Hardware Description." Florian Riedl, Tobias Scheipel, and Marcel Baunach (Graz University of Technology)
Organizers
LATTE's organizing team this year is:
- Rachit Nigam, MIT
- Adrian Sampson, Cornell
- Frans Skarman, Munich University of Applied Sciences
- Edward Wang, MIT