Capra is a research group at Cornell in the Computer Science and Electrical and Computer Engineering departments. Our research studies abstractions and efficiency through the interaction of programming languages and computer architecture.

Check out our ongoing research below or read news about the group. If you’re a Cornell undergraduate student, consider working with us!

Hardware Accelerator Generation

Filament, an HDL for Fearless Hardware Design

Filament is a new hardware design language that uses a substructural type system to reason about low-level programs and ensure that they generate correct and efficient hardware.

Calyx, an Infrastructure for Hardware Accelerator Compilers

We’re designing Calyx, an intermediate language (IL) and infrastructure for building compilers that generate hardware accelerators. Calyx works by representing both hardware-like structure and software-like control together. Calyx is a part of the LLVM CIRCT project and supports Cider and Pollen. You can try Calyx in your browser.

Dahlia, a Language for Predictable Accelerator Design

High-level synthesis (HLS) tools can translate C-like languages to hardware accelerators, but the semantic gap between software and hardware can yield unpredictable performance and semantics. Dahlia adds a substructural type system to model hardware resources and their constraints to statically reject HLS designs that make unpredictable area-latency trade-offs. You can try Dahlia in your browser.

Graphics Programming

Gator: Geometry Types

We have identified a new category of geometry bugs that arise in graphics programming and other domains that have to deal with matrices and vectors. They arise when programmers lose track of the coordinate systems and reference frames that underpin the computation. Gator is a language for GPU shading with a type system that can eliminate geometry bugs and rule them out by generating correct-by-construction transformation code.

Braid, a Safe Heterogeneous Language for Real-Time Graphics

Braid is a programming language for heterogeneous programming, where a single source program targets different hardware units. We have applied it to real-time graphics programming on CPU–GPU systems. Braid compiles to WebGL, so you can try it out in your browser.

Search-Based Compilation for Digital Signal Processing

Digital signal processors (DSPs) are ubiquitous and energy efficient, but making them fast requires an expert programmer. The difficulty stems from their complex vector instruction sets and simple, in-order pipelines. To get the best results, programmers must carefully pack and move data in vector registers to enable compact execution. Diospyros uses equality saturation to automatically discover efficient vector packing schemes.

Vision/System Co-Design

Customizing JPEG Compression for Computer Vision

Image compression formats like JPEG are ubiquitous in computer vision, but they were designed for human perception—not for modern vision algorithms. We examine the potential for customizing JPEG compression for specific vision tasks, simultaneously improving compression the ratio and the accuracy.

Exploiting Temporal Redundancy for Live Computer Vision

Vision accelerators that run on real-time video process nearly identical frames at every time step. This project introduces activation motion compensation, a technique for approximately incremental acceleration of computer vision. It works by measuring motion in the input video and translating it to motion in the intermediate results of convolutional neural networks.

A Vision Mode for Efficient Image Capture

Most camera systems are optimized for photography, so they waste time and energy when they capture images for computer vision. This project designs a vision mode for cameras and their associated signal processing logic that saves energy by producing lower-quality, less-processed image data.

Archived Research

People

Faculty

PhD Students

Undergrad & MEng

  • Caleb Kim
  • Edmund Lam
  • Elias Castro
  • Elise Song
  • Ethan Gabizon
  • Justin Ngai
  • Kaden Lei
  • Meredith Hu
  • Nathaniel Navarro
  • Pai Li
  • Stephen Verderame

Staff

  • Shailja Gaur Program Manager

In Memoriam

Alumni

  • Mark Buckler PhD 2019
  • Alexa VanHattum PhD 2023
  • Philip Bedoukian PhD 2023
  • Alaia Solko-Breslin BS & Meng 2022
  • Edwin Peguero MS 2021
  • Zhijing Li MS 2021
  • Henry Liu BS & MEng 2020
  • Alex Wong MEng 2019
  • Harrison Goldstein BS & MEng 2018
  • Daniel Sainati BS & MEng 2018
  • Shiyu Wang MEng 2018
  • Evan Su MEng 2018
  • Arthur Wang MEng 2018
  • Jonathan Tran MS 2023
  • David Chen MEng 2023
  • David Siher BS 2022
  • Jasper Liang BS & Meng 2022
  • Vivi Ye BS 2022
  • Patrick LaFontaine BS 2021
  • Chris Gyurgyik BS 2021
  • Karen Zhang BS 2021
  • Paul Joo BS 2021
  • Richard Wang BS 2021
  • Kimberly Baum BS 2020
  • Katy Voor BS 2020
  • Kenneth Fang BS 2020
  • Horace He BS 2020
  • Samuel Thomas BS 2020
  • Apurva Koti BS 2020
  • Aditi Kabra BS 2019
  • Yinnon Sanders BS 2019
  • Irene Yoon BS 2019
  • Theodore Bauer BS 2019
  • Alex Renda BS 2018
  • Mia Daniels BS 2023
  • Basant Khalil BS 2023
  • Mateo Guynn
  • Maya Ifekauche visitor, Auburn University
  • Jacob Delgado-López visitor, University of Puerto Rico
  • Sachille Atapattu
  • YoungSeok (Alex) Na

News

Several members of the lab shared memories of our dear friend and colleague, Priya Srikumar.

Anshuman and collaborators have a paper at OOPSLA ’23. The work, which applies PL formalisms to packet scheduling, has won a best paper award!

Alexa’s paper on verifying the Cranelift code generator’s backend was accepted to ASPLOS 2024! Check out the preprint.

Congratulations to Dr. Philip Bedoukian on successfully defending his PhD dissertation!

Many congratulations to Dr. Alexa VanHattum, who successfully defended her PhD dissertation!

We’re running a tutorial about Calyx at FCRC in June, where you learn to build your own DSL-to-hardware compiler.

Pai was quoted about our research in a news story about an undergraduate research program in Bowers CIS that Adrian helped create.

We’re organizing the 3rd edition of LATTE, an ASPLOS workshop about PL and compilers problems in accelerator design. Submit 2-page position papers by February 7.

Our paper on Cider, a gdb-like interactive debugger for hardware accelerators using Calyx, is conditionally accepted to ASPLOS 2023!